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Неделя 310 ₽Месяц 630 ₽3 месяца 1 680 ₽Год 5 680 ₽

FPGA/RTL Designer — Banyan Ridge Solutions, Greater Sacramento

Разработчики · 03.11.2026

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Компания: Banyan Ridge Solutions

Локация: Greater Sacramento

Формат: не указан

Занятость: Полная занятость

Грейд: Senior

Senior / Staff FPGA Design Engineer

Sacramento Region, California | Direct Hire | Hybrid Flexibility

Banyan Ridge Solutions is conducting a confidential search for an engineering organization in the Sacramento region seeking a Senior or Staff-level FPGA Design Engineer.

This is a hands-on role for an engineer who enjoys broad technical ownership and wants to work across the complete FPGA development lifecycle rather than focusing on only one portion of the design process.

The right person should be comfortable taking designs from architecture and RTL through simulation, implementation, timing closure, hardware debugging and system validation.

Strong ASIC architecture and RTL engineers who are interested in hands-on FPGA development are also encouraged to apply.

WHAT YOU’LL WORK ON

• FPGA architecture and RTL design using Verilog, SystemVerilog and/or VHDL

• RTL development including state machines, datapaths, pipelining and control logic

• Simulation, testbench development and functional verification

• Synthesis, place-and-route and FPGA implementation

• Timing analysis and timing closure

• Clock-domain crossing and reset-domain considerations

• High-speed digital interfaces and memory systems

• FPGA resource utilization and design optimization

• Board-level integration and system debugging

• Hands-on laboratory bring-up and hardware validation

• Troubleshooting across FPGA, hardware and embedded-system boundaries

• Technical ownership from initial design through working hardware

WHAT WE’RE LOOKING FOR

• Significant professional experience in FPGA or closely related ASIC/RTL design

• Strong Verilog, SystemVerilog and/or VHDL experience

• Experience developing original RTL rather than primarily integrating existing IP

• Experience taking designs through synthesis, implementation and timing closure

• Strong understanding of synchronous digital design principles

• Experience with CDC, setup/hold timing and clocking architectures

• Experience with high-speed interfaces and/or memory systems

• Hands-on experience debugging FPGA designs in real hardware

• Ability to work independently and take ownership of technically complex designs

• Strong engineering judgment and problem-solving ability

Experience with major FPGA platforms is valuable, but specific vendor or device-family experience is less important than strong fundamentals and full-development-cycle ownership.

ASIC ENGINEERS

Engineers coming primarily from an ASIC background will be considered if they have strong microarchitecture and RTL design experience and are interested in working directly with FPGA implementation, hardware debugging and system-level development.

LOCATION

The position is based in the Sacramento region of Northern California.

Local candidates are preferred. Hybrid flexibility may be available for exceptional Northern California candidates, with onsite participation required at certain stages of the development process.

This is not intended to be a fully remote position.

COMPENSATION

Base salary: $140,000–$230,000, depending on experience and technical level.

The position also includes additional compensation opportunities and a comprehensive benefits package.

Benefits include:

• Medical, dental and vision coverage

• 401(k) matching

• Additional retirement/profit-sharing contributions

• Performance/additional compensation opportunity

• Paid time off and holidays

• Paid parental leave

WORK AUTHORIZATION

Candidates must be U.S. citizens or lawful permanent residents/Green Card holders. Sponsorship is not available for this position.

WHY CONSIDER IT

This opportunity is well suited for an experienced engineer who wants meaningful technical ownership and the ability to remain directly involved in architecture, implementation, debugging and hardware development.

The role provides broad exposure across the FPGA development lifecycle and the opportunity to work closely with an experienced technical team.

This search is being conducted confidentially by Banyan Ridge Solutions. Qualified candidates will receive additional information about the company, projects and working environment during the initial conversation.

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